Proposal and Investigation of Area Scaled Nanosheet Tunnel FET: A Physical Insight
Shobhit Srivastava, Sourabh Panwar, Abhishek Acharya
Abstract
While considering the low power demand as a fundamental bottleneck for nanoscale devices, this work comprehensively investigates a novel concept that incorporates the area-scaled tunneling in a nanosheet field-effect transistor (NSFET) at a 5-nm technology node. Integrating the area scale tunneling phenomenon with NSFET provides improved electrical performance. We observed <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${\sim } 50\times $ </tex-math></inline-formula> improvement in drain current and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\sim 2\times $ </tex-math></inline-formula> improvement in subthreshold slope (SS) by incorporating epitaxial layer over the source region underneath the gate. Furthermore, 100 mV of the shift in tunneling onset voltage ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{T, \mathrm{\scriptscriptstyle ON}}$ </tex-math></inline-formula> ) is also noted when source doping increases from <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1 \times 10^{{18}}$ </tex-math></inline-formula> to <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1 \times 10^{{20}}$ </tex-math></inline-formula> cm <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{-{3}}$ </tex-math></inline-formula> . The gate–source overlap ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${L}_{\text {OV}}$ </tex-math></inline-formula> ) significantly improves the transconductance without sacrificing the output resistance. It is examined that epitaxial layer thickness ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${T}_{\text {EPI}}$ </tex-math></inline-formula> ) of 3–4 nm gives the best possible drive current for the proposed device. However, the OFF current exhibits an inversely proportional relation with <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${T}_{\text {EPI}}$ </tex-math></inline-formula> . It is worth highlighting that optimum <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${T}_{\text {EPI}}$ </tex-math></inline-formula> can be determined by only considering the suitable epitaxial layer doping profile ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${N}_{\text {EPI}}$ </tex-math></inline-formula> ). A linear shift in <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{T, \mathrm{\scriptscriptstyle ON}}$ </tex-math></inline-formula> of the proposed device with work function (WF) is also reported in our work. Finally, the concept of multiple stacking is explored to boost the device’s performance. Including the presented device design guidelines, the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${I}_{\mathrm{\scriptscriptstyle ON}}/{I}_{\mathrm{\scriptscriptstyle OFF}}$ </tex-math></inline-formula> ratio of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\sim 4.5 \times 10^{{8}}$ </tex-math></inline-formula> with an average SS of ~20 mV/dec is successfully demonstrated for the proposed device.