Litcius/Paper detail

Improved quantum error correction with randomized compiling

Aditya Jain, Pavithran Iyer, Stephen D. Bartlett, Joseph Emerson

2023Physical Review Research15 citationsDOIOpen Access PDF

Abstract

Current hardware for quantum computing suffers from high levels of noise, and so to achieve practical fault-tolerant quantum computing will require powerful and efficient methods to correct for errors in quantum circuits. Here, we explore the role and effectiveness of using noise tailoring techniques to improve the performance of error correcting codes. Noise tailoring methods such as randomized compiling (RC) convert complex coherent noise processes to effective stochastic noise. While it is known that this can be leveraged to design efficient diagnostic tools, we explore its impact on the performance of error correcting codes. Of particular interest is the important class of coherent errors, arising from control errors, where RC has the maximum effect---converting these into purely stochastic errors. For these errors, we show here that RC delivers an improvement in performance of the concatenated Steane code by several orders of magnitude. We also show that below a threshold rotation angle, the gains in logical fidelity can be arbitrarily magnified by increasing the size of the codes. These results suggest that using randomized compiling can lead to a significant reduction in the resource overhead required to achieve fault tolerance.

Topics & Concepts

Computer scienceOverhead (engineering)Error detection and correctionNoise (video)FidelityComputer engineeringQuantum computerFault toleranceReduction (mathematics)Code (set theory)AlgorithmQuantum error correctionQuantum noiseRotation (mathematics)QuantumDistributed computingMathematicsTelecommunicationsArtificial intelligenceSet (abstract data type)PhysicsQuantum mechanicsGeometryProgramming languageOperating systemImage (mathematics)Quantum Computing Algorithms and ArchitectureQuantum Information and CryptographyAdvancements in Semiconductor Devices and Circuit Design