Predicting Lifetime of Semiconductor Power Devices Under Power Cycling Stress Using Artificial Neural Network
Alessandro Vaccaro, Paolo Magnone, Andrea Zilio, Paolo Mattavelli
Abstract
This article analyzes the problem of modeling the lifetime in semiconductor power devices subjected to power cycling stress using artificial neural networks (ANNs). This article discusses the optimal configuration of ANNs for the considered problem, aiming at minimizing the error in the predicted lifetime and at reducing the required number of training data. Moreover, being the device lifetime a stochastic parameter, the suitability of ANNs is verified in the case of variability in the input training data. Power cycling tests are conducted on insulated gate bipolar transistor (IGBT) devices and the experimental number of cycles to failure are adopted for the training process of the ANN.