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Ionizing radiation damage in 65 nm CMOS technology: Influence of geometry, bias and temperature at ultra-high doses

G. Borghello, Edoardo Lerario, F. Faccio, Henri D. Koch, G. Termo, Stefano Michelis, F. Márquez, F.R. Palomo, F. Muñoz

2020Microelectronics Reliability30 citationsDOI

Topics & Concepts

Shallow trench isolationLarge Hadron ColliderRadiationOptoelectronicsCMOSMaterials scienceTransistorIrradiationRadiation damageRadiation hardeningPlanarIonizing radiationTrenchElectrical engineeringOpticsPhysicsNuclear physicsNanotechnologyEngineeringComputer scienceVoltageLayer (electronics)Computer graphics (images)Radiation Effects in ElectronicsSemiconductor materials and devicesAdvancements in Semiconductor Devices and Circuit Design
Ionizing radiation damage in 65 nm CMOS technology: Influence of geometry, bias and temperature at ultra-high doses | Litcius