Dual-modular-redundancy and dual-level error-interception based triple-node-upset tolerant latch designs for safety-critical applications
Aibin Yan, Zhihui He, Jun Zhou, Jie Cui, Tianming Ni, Zhengfeng Huang, Xiaoqing Wen, Patrick Girard
Topics & Concepts
Redundancy (engineering)UpsetInterceptionTriple modular redundancyModular designNode (physics)Computer scienceDual (grammatical number)Error detection and correctionEmbedded systemEngineeringAlgorithmOperating systemMechanical engineeringBiologyStructural engineeringLiteratureEcologyArtRadiation Effects in ElectronicsPhysical Unclonable Functions (PUFs) and Hardware SecuritySemiconductor materials and devices