Interface state analysis of Schottky-gated p-AlGaN/u-GaN/AlGaN p-FET with negligible hysteresis at high temperatures
Huake Su, Tao Zhang, Shengrui Xu, Hongchang Tao, Boxiang Yun, Jincheng Zhang, Yue Hao
Abstract
In this Letter, we demonstrate the Schottky gated p-AlGaN/u-GaN/AlGaN p-channel field-effect transistors (p-FETs) with an extremely low interface state density of 2.5 × 1011 cm−2 eV−1. Benefiting from the high-quality Schottky interface with suppressed interface states, the excellent stability with negligible hysteresis is proved, even after ten sequential dual I–V sweeps at 150 °C. Meanwhile, the trap density, confirmed by the temperature-dependent conductance method, is still below 1012 cm−2 eV−1 at high temperature. Furthermore, the fabricated p-AlGaN/u-GaN/AlGaN p-FET with a gate to drain distance of 1.8 μm shows a breakdown voltage of −128 V and an effective on-resistance of 7.2 kΩ mm, which allows the further scale down in terms of the source–drain spacing to improve the conduction current for low voltage application. The ultra-stable I–V characteristics of the fabricated Schottky-gated p-AlGaN/u-GaN/AlGaN p-FETs show great potential for next-generation integrated circuit application at high temperatures.