Active Gate Driver With Turn-off Delay Control for Voltage Balancing of Series–Connected SiC MOSFETs
Myeongsu Son, Younghoon Cho, Seunghoon Baek
Abstract
Connecting semiconductor switches in series is a way to increase the voltage rating of a power electronic converter. However, if two switches are directly connected without any special effort, an uneven voltage between the switches can occur due to nonidentical characteristics of them. A significant voltage imbalance may destroy the switches, and both thermal and loss imbalance also lead to the unstable system. Since a silicon carbide (SiC) metal–oxide–semiconductor field–effect transistor ( <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> ) has a faster switching speed and higher voltage blocking capability than silicon (Si) devices, existing voltage balancing methods for Si devices may not be suitable. This article proposes a voltage balancing method that controls turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> delay time of the switch by adding one bipolar junction transistor (BJT) on a gate turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> path. Depending on the base voltage of the BJT, turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> resistance and delay time are actively changed which mitigates the imbalance problem. The theoretical analysis of the proposed method has been discussed in detail based on the classical <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> model. Both the simulations and experiments have been performed to verify the theory and the validity of the proposed method where the voltage imbalance is reduced from 22.4% to 3.2% as well as reducing the switching loss at the entire voltage and load conditions.