Gate‐Coupling‐Enabled Robust Hysteresis for Nonvolatile Memory and Programmable Rectifier in Van der Waals Ferroelectric Heterojunctions
Wenhao Huang, Feng Wang, Lei Yin, Ruiqing Cheng, Zhenxing Wang, Marshet Getaye Sendeku, Junjun Wang, Ningning Li, Yuyu Yao, Jun He
Abstract
Abstract Ferroelectric field‐effect transistors (FeFETs) are one of the most interesting ferroelectric devices; however, they, usually suffer from low interface quality. The recently discovered 2D layered ferroelectric materials, combining with the advantages of van der Waals heterostructures (vdWHs), may be promising to fabricate high‐quality FeFETs with atomically thin thickness. Here, dual‐gated 2D ferroelectric vdWHs are constructed using MoS 2 , hexagonal boron nitride (h‐BN), and CuInP 2 S 6 (CIPS), which act as a high‐performance nonvolatile memory and programmable rectifier. It is first noted that the insertion of h‐BN and dual‐gated coupling device configuration can significantly stabilize and effectively polarize ferroelectric CIPS. Through this design, the device shows a record‐high performance with a large memory window, large on/off ratio (10 7 ), ultralow programming state current (10 −13 A), and long‐time endurance (10 4 s) as nonvolatile memory. As for programmable rectifier, a wide range of gate‐tunable rectification behavior is observed. Moreover, the device exhibits a large rectification ratio (3 × 10 5 ) with stable retention under the programming state. This demonstrates the promising potential of ferroelectric vdWHs for new multifunctional ferroelectric devices.