First Demonstration of BEOL-Compatible 3D Fin-Gate Oxide Semiconductor Fe-FETs
Qiwen Kong, Long Liu, Zijie Zheng, Chen Sun, Annie Kumar, Rui Shao, Zuopu Zhou, Leming Jiao, Jishen Zhang, Haiwen Xu, Yue Chen, Gan Liu, Dong Zhang, Xiaolin Wang, Bich-Yen Nguyen, Xiao Gong
Abstract
For the first time, we report back-end-of-line (BEOL)-compatible 3D fin-gate oxide semiconductor (OS) ferroelectric field-effect-transistors (Fe-FETs) featuring ALD-deposited ZnO channel and Zr-doped HfO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> (HZO) ferroelectric dielectric with a channel length (L <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ch</inf> ) as small as 50 nm. Both ZnO and HZO are able to conformally cover the fin-shaped W metal gate with uniform thickness on all surfaces. The fin-gate OS Fe-FETs show excellent electrical characteristics, including memory window (MW) of 1.9 V (L <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ch</inf> of $1 \mu$m) and 1.5 V (L <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ch</inf> of 50 nm), high endurance of 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">8</sup> cycles, retention of more than 10 years at room temperature, robust current ON/OFF ratio ($I_{on}/I_{on}$) more than 6 orders, and good linearity of the multi-state conductance characteristics. Together with the capability to suppress the device-to-device threshold voltage (V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</inf> ) variation, our fin-gate OS Fe-FETs demonstrate tremendous potential for future ultra-high-density 3D integrated computing applications.