Approaching Trap‐Minimized Polymer Thin‐Film Transistors
Gyo Kitahara, Mitsuhiro Ikawa, Satoshi Matsuoka, Shunto Arai, Tatsuo Hasegawa
Abstract
Abstract Semiconducting π‐conjugated polymers are the most promising candidates for flexible electronics owing to their facile processability and mechanical robustness; however, achieving steep and stable switching operations in polymer thin‐film transistors (TFTs) remains a serious challenge. Herein, it is shown that whole optimizations for eliminating interfacial carrier traps throughout the conductive path are necessary in achieving TFTs showing both exceptionally sharp switching and bias‐stress‐free characteristics. Inverted‐coplanar‐type TFTs composed of a highly lyophobic amorphous perfluoropolymer gate–dielectric interfaced with a push‐coated semiconducting polymer layer are manufactured. The use of the dielectric allows the establishment of bias‐stress‐free characteristics with minimized contact resistance. Additionally, fairly sharp on/off switching TFTs with the smallest normalized subthreshold swing can be obtained by utilizing a particular donor–acceptor copolymer that involves a self‐passivation mechanism working to achieve a trap‐minimized interface. These findings have opened a way for low‐power and robust device operations in polymer‐based flexible electronics.