Acceleration of Semiconductor Device Simulation With Approximate Solutions Predicted by Trained Neural Networks
Seung‐Cheol Han, Jonghyun Choi, Sung‐Min Hong
Abstract
In order to accelerate the semiconductor device simulation, we propose to use a neural network to learn an approximate solution for desired bias conditions. With an initial solution (predicted by a trained neural network) sufficiently close to the final one, the computational cost to calculate several unnecessary solutions is significantly reduced. Specifically, a convolutional neural network for the metal–oxide–semiconductor field-effect transistor (MOSFET) is trained in a supervised manner to compute the initial solution. In particular, we propose to consider a device template for various devices and a compact expression of the solution based on the electrostatic potential. We empirically show that the proposed method accelerates the simulation significantly.