Three-Phase Impedance-Source Inverter With Common-Mode Voltage Reduction
Truong‐Duy Duong, Minh‐Khai Nguyen, Tan‐Tai Tran, Dai-Van Vo, Young‐Cheol Lim, Joon‐Ho Choi
Abstract
This article presents a three-phase two-level impedance-source inverter to decrease the magnitude of common-mode voltage and enhance the output voltage capability. Shoot-through states are inserted into zero states to ensure for boosting voltage and improving the output voltage quality with higher modulation index. Moreover, the advantage of the proposed solution is as low voltage stress on capacitors, switches and diodes in impedance-source network. The theoretical analysis, circuit analysis, and logic functions of the proposed solution are introduced. A comparison between the proposed solution with other impedance-source inverter topologies for common-mode voltage reduction is also reported. Besides that, the simulation verification and 1-kW experimental prototype were developed and verified to prove the proposed solution.