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Machine Learning Aided Device Simulation of Work Function Fluctuation for Multichannel Gate-All-Around Silicon Nanosheet MOSFETs

Chandni Akbar, Yiming Li, Wen Li Sung

2021IEEE Transactions on Electron Devices47 citationsDOI

Abstract

A machine learning (ML) aided device simulation of work function fluctuation (WKF) for 3-D multichannel gate-all-around silicon nanosheet MOSFET is presented. To establish the ML model, the random forest regressor (RFR) is explored to predict the characteristic variation of the explored device. The proposed ML-RFR algorithm for predicting the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${I} _{D}$ </tex-math></inline-formula> – <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V} _{G}$ </tex-math></inline-formula> curve shows the same degree of accuracy as device simulation and it also estimates the minimum required samples for the converged ML-RFR model, i.e., 330 samples. By using the root mean squared error value, error rate, and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R} ^{{2}}$ </tex-math></inline-formula> score as the evaluation tools, our ML-RFR model infers with an <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R} ^{{2}}$ </tex-math></inline-formula> score of 99% and an error rate of less than 1%. The main objective of this work is to explore the possibility of ML model that can replace the device simulation to reduce the computational cost and drive energy-efficient devices.

Topics & Concepts

NotationAlgorithmFunction (biology)MathematicsComputer scienceArtificial intelligenceMachine learningArithmeticBiologyEvolutionary biologyAdvancements in Semiconductor Devices and Circuit DesignSemiconductor materials and devicesLow-power high-performance VLSI design
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