TinyVers: A 0.8-17 TOPS/W, 1.7 μW-20 mW, Tiny Versatile System-on-chip with State-Retentive eMRAM for Machine Learning Inference at the Extreme Edge
Vikram Jain, Juan Sebastian Piedrahita Giraldo, Jaro De Roose, Bert Boons, Linyan Mei, Marian Verhelst
Abstract
This paper presents TinyVers, a tiny versatile ultra-low power ML system-on-chip (SoC) to bring enhanced intelligence to the Extreme Edge. TinyVers exploits dataflow flexibility for multi-model support, and aggressive on-chip power management optimized for Extreme Edge smart sensing applications. The SoC combines a RISC-V host processor, a 17 TOPS/W flexible ML accelerator with block structured sparsity support and efficient zero-skipping for deconvolution, a 1.7 μW deep sleep wake-up controller and an eMRAM for non-volatile storage, to perform up to 17.6 GOPS while achieving a power range from 1.7 μW-20 mW. Multiple ML models for diverse applications are mapped to show the flexibility and energy efficiency of the SoC with all models achieving 1-2 TOPS/W at less than 230 μW power for continuous operation.