Litcius/Paper detail

An Ultra-Low Cost and Multicast-Enabled Asynchronous NoC for Neuromorphic Edge Computing

Zhe Su, Simone Ramini, Demetra Coffen Marcolin, Alessandro Veronesi, Miloš Krstić, Giacomo Indiveri, Davide Bertozzi, Steven M. Nowick

2024IEEE Journal on Emerging and Selected Topics in Circuits and Systems15 citationsDOIOpen Access PDF

Abstract

Biological brains are increasingly taken as a guide toward more efficient forms of computing. The latest frontier considers the use of spiking neural-network-based neuromorphic processors for near-sensor data processing, in order to fit the tight power and resource budgets of edge computing devices. However, a prevailing focus on brain-inspired computing and storage primitives in the design of neuromorphic systems is currently bringing a fundamental bottleneck to the forefront: chip-scale communications. While communication architectures (typically, a network-on-chip) are generally inspired by, or even borrowed from, general purpose computing, neuromorphic communications exhibit unique characteristics: they consist of the event-driven routing of small amounts of information to a large number of destinations within tight area and power budgets. This article aims at an inflection point in network-on-chip design for brain-inspired communications, revolving around the combination of cost-effective and robust asynchronous design, architecture specialization for short messaging and lightweight hardware support for tree-based multicast. When validated with functional spiking neural network traffic, the proposed NoC delivers energy savings ranging from 42% to 71% over a state-of-the-art NoC used in a real multi-core neuromorphic processor for edge computing applications.

Topics & Concepts

Neuromorphic engineeringMulticastAsynchronous communicationComputer scienceComputer architectureEnhanced Data Rates for GSM EvolutionEdge computingMaterials scienceComputer networkTelecommunicationsArtificial neural networkArtificial intelligenceAdvanced Memory and Neural ComputingFerroelectric and Negative Capacitance DevicesQuantum Computing Algorithms and Architecture