Efficient and Robust Nonvolatile Computing-In-Memory Based on Voltage Division in 2T2R RRAM With Input-Dependent Sensing Control
Linfang Wang, Wang Ye, Chunmeng Dou, Xin Si, Xiaoxin Xu, Jing Liu, Dashan Shang, Jianfeng Gao, Feng Zhang, Yongpan Liu, Meng‐Fan Chang, Qi Liu
Abstract
Resistive memory (RRAM) provides an ideal platform to develop embedded non-volatile computing-in-memory (nvCIM). However, it faces several critical challenges ranging from device non-idealities, large DC currents, and small signal margins. To address these issues, we propose voltage-division (VD) based computing approach and its circuit implementation in two-transistor-two-resistor (2T2R) RRAM cell arrays, which can realize energy-efficient, sign-aware, and robust deep neural network (DNN) processing. A readout technique, namely the input-dependent sensing control (IDSC) scheme, is also introduced for power saving. On this basis, a 400kb VD-based RRAM nvCIM is silicon verified. It achieves 2.54 times power reduction compared to that of the ones rely on conventional weighted-current summation (WCS) mechanism, a peak energy-efficiency of 42.6 TOPS/W and a minimum latency of 15.98 ns.