GenMul: Generating Architecturally Complex Multipliers to Challenge Formal Verification Tools
Alireza Mahzoon, Daniel Große, Rolf Drechsler
Topics & Concepts
CorrectnessMultiplier (economics)Computer scienceVerilogFunctional verificationScalabilityComputer architectureFormal verificationArithmeticTheoretical computer scienceComputer hardwareProgramming languageField-programmable gate arrayMathematicsOperating systemEconomicsMacroeconomicsFormal Methods in VerificationLow-power high-performance VLSI designVLSI and Analog Circuit Testing