Litcius/Paper detail

A 40nm 64kb 26.56TOPS/W 2.37Mb/mm<sup>2</sup>RRAM Binary/Compute-in-Memory Macro with 4.23x Improvement in Density and &gt;75% Use of Sensing Dynamic Range

Samuel Spetalnick, Muya Chang, Brian Crafton, Win-San Khwa, Yu-Der Chih, Meng‐Fan Chang, Arijit Raychowdhury

20222022 IEEE International Solid- State Circuits Conference (ISSCC)58 citationsDOI

Abstract

Compute-in-Memory (CIM) using emerging nonvolatile (eNVM) memory technologies, such as resistive random-access memory (RRAM), has been shown by several implemented macros to be an energy-efficient alternative to traditional von Neumann architectures [1]–[6]. Since moving data on- and off-chip has a high energy cost, area efficiency is important to the practical utility of CIM with RRAM. Many systems demonstrated so far have not reported area efficiency or addressed the challenges CIM with RRAM presents with respect to practical area-constrained integrated circuits.

Topics & Concepts

Resistive random-access memoryMacroVon Neumann architectureNon-volatile memoryComputer scienceRandom access memoryBinary numberEfficient energy useRange (aeronautics)Electronic engineeringComputer architectureComputer hardwareElectrical engineeringEngineeringVoltageOperating systemArithmeticMathematicsProgramming languageAerospace engineeringAdvanced Memory and Neural ComputingFerroelectric and Negative Capacitance DevicesSemiconductor materials and devices