Litcius/Paper detail

A Semi-Supervised and Incremental Modeling Framework for Wafer Map Classification

Yuting Kong, Dong Ni

2020IEEE Transactions on Semiconductor Manufacturing70 citationsDOI

Abstract

Wafer map analysis provides critical information for quality control and yield improvement tasks in semiconductor manufacturing. In particular, wafer patterns of gross failing areas (GFA) are important clues to identify the causes of relevant failures during the manufacturing process. In this work, a semi-supervised classification framework is proposed for wafer map analysis, and its application to wafer bin maps with GFA patterns classification is demonstrated. The Ladder network and the semi-supervised variational autoencoder are adopted to classify wafer bin maps in comparison with a standard convolutional neural network (CNN) model on two real-world datasets. The results have illustrated that two semi-supervised models are consistently and substantially better than the CNN model across various training data percentages by effective utilization of the unlabeled data. Active learning and pseudo labeling are also utilized to accelerate the learning curve.

Topics & Concepts

WaferArtificial intelligenceAutoencoderConvolutional neural networkBinComputer scienceSemiconductor device fabricationArtificial neural networkPattern recognition (psychology)Data miningMachine learningSupervised learningQuality (philosophy)EngineeringAlgorithmEpistemologyElectrical engineeringPhilosophyIndustrial Vision Systems and Defect DetectionAdvancements in Photolithography TechniquesIntegrated Circuits and Semiconductor Failure Analysis