A 135 GBps/Gbit 0.66 pJ/bit Stacked Embedded DRAM with Multilayer Arrays by Fine Pitch Hybrid Bonding and Mini-TSV
Song Wang, Bing Yu, Wenwu Xiao, Fujun Bai, Xiaodong Long, Liang Bai, Xuerong Jia, Fengguo Zuo, Jie Tan, Yixin Guo, Peng Sun, Zhou Jun, Qiong Zhan, Sheng Hu, Yu Zhou, Yi Kang, Qiwei Ren, Xiping Jiang
Abstract
For the first time, multilayer die stack using fine hybrid bonding (HB) with mini-TSV stacking technology is presented and demonstrated for stacked embedded DRAM (SeDRAM). The daisy chains in the multilayer structure with over ten thousand TSVs and bonds were tested and demonstrated the good bonding, stacking quality and reliability. We fabricated LPDD4/4X product by the SeDRAM, with 2048 I/O of 541 Mbps per Gbit, achieving a bandwidth of 135 GBps and power efficiency of 0.66 pJ/bit, exhibiting the improvement of 27.7X for bandwidth and 83% for power efficiency compared to HBM3. Besides, we also put forward the x-test to achieve normal testing and TSV quality judgment.