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Roadmap for ferroelectric domain wall memory

Jie Sun, Yiming Li, Di Hu, Bo Shen, Boyang Zhang, Zilong Wang, Haiyue Tang, Anquan Jiang

2024Microstructures14 citationsDOIOpen Access PDF

Abstract

Commercial nonvolatile Ferroelectric Random Access Memory employs a destructive readout scheme based on charge sensing, which limits its cell scalability in sizes above 100 nm. Ferroelectric domain walls are two-dimensional topological interfaces with thicknesses approaching the unit cell level between two antiparallel domains and exhibit electrical conductivity, distinguishing them from insulating matrices that are uniformly ordered. Recently, novel research has been devoted to utilizing this extraordinary interface for the application in nonvolatile memory with nanometer-sized scalability and low energy consumption. Here, we pay more attention to the development of the domain wall memory technologies in the future with challenges and opportunities to design planar and vertical arrays of the memory cells in the CMOS platform.

Topics & Concepts

ScalabilityFerroelectricityNon-volatile memoryMaterials sciencePlanarAntiparallel (mathematics)Domain (mathematical analysis)Memory cellDomain wall (magnetism)CMOSComputer scienceNanotechnologyOptoelectronicsElectrical engineeringVoltageTransistorPhysicsEngineeringMagnetic fieldComputer graphics (images)MathematicsDielectricDatabaseMagnetizationMathematical analysisQuantum mechanicsAdvanced Memory and Neural ComputingFerroelectric and Piezoelectric MaterialsFerroelectric and Negative Capacitance Devices
Roadmap for ferroelectric domain wall memory | Litcius