Low-Power SAR ADCs: Basic Techniques and Trends
Pieter Harpe
Abstract
With the advent of small, battery-powered devices, power efficiency has become of paramount importance. For Analog-to-Digital-Converters (ADCs), the Successive Approximation Register (SAR) architecture plays a prominent role thanks to its ability to combine power efficiency with a simple architecture, a broad application scope, and technology portability. In this review article, the basic design challenges for low-power SAR ADCs are summarized and several design techniques are illustrated. Further, the limitations of SAR ADCs are outlined and hybrid architecture trends, like noise-shaping SAR ADCs and pipelined SAR ADCs, are briefly introduced and clarified with examples.
Topics & Concepts
Software portabilityConvertersScope (computer science)Computer scienceArchitectureElectronic engineeringSuccessive approximation ADCPower (physics)Computer architectureEngineeringElectrical engineeringVoltageQuantum mechanicsCapacitorPhysicsProgramming languageVisual artsArtAnalog and Mixed-Signal Circuit DesignAdvancements in Semiconductor Devices and Circuit DesignRadiation Effects in Electronics