Counteractive Coupling IGZO/CNT Hybrid 2T0C DRAM Accelerating RRAM-based Computing-In-Memory via Monolithic 3D Integration for Edge AI
Mingcheng Shi, Yanbo Su, Jianshi Tang, Yijun Li, Yiwei Du, Ran An, Jiaming Li, Yuankun Li, Jian Yao, Ruofei Hu, Yuan He, Yue Xi, Qingwen Li, Song Qiu, Qingtian Zhang, Liyang Pan, Bin Gao, He Qian, Huaqiang Wu
Abstract
In this work, we demonstrate a novel backend-of-the-line (BEOL) compatible IGZO/CNT hybrid-polarity 2T0C DRAM cell, which is further integrated on our analog RRAM-based monolithic 3D (M3D) integration platform for edge artificial intelligence (AI) applications. Incorporating n-type ultra-low-leakage InGaZnO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</inf> (IGZO) for write transistor and p-type high-current carbon nanotubes (CNTs) for read transistor, this design achieves a decent retention and desirably large read currents with a VLSI-compatible low data voltage (V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">data</inf> ). In addition, the unique IGZO-NFET/CNT-PFET hybrid-polarity 2T0C design enhances the effective sensing window and, more importantly, addresses the charge injection issue through counteractive coupling. This BEOL hybrid 2T0C cell achieves a long retention of 170s, a write speed of sub-20 ns and a read current of 29.7 μA/μm at V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DS</inf> =1V with |V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">data</inf> | = 0.5V. The performance evaluation enables its utilization as a buffer layer on top of the computing-in-memory (CIM) layer with HfO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> -based analog RRAM, empowering a prototype monolithic 3D chip (namely M3D-BRIC) for high-resolution (Hi-Res) videos processing. A YOLOv3 network is further implemented for the objects detection task, and the benchmarks show that the M3D-BRIC architecture of CIM/2T0C-DRAM could achieve a 48.25× higher processing capability than its 2D counterpart.