A 1024-Channel Simultaneous Recording Neural SoC with Stimulation and Real-Time Spike Detection
Do-Yeon Yoon, Sonal Pinto, SungWon Chung, Paul Merolla, Thong-Wei Koh, Dongjin Seo
Abstract
A fully implantable brain-machine interface (BMI) targeting clinical applications has stringent size and power requirements. In this paper we present a 5×4mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> neural system-on-chip (SoC) capable of recording and stimulating from 1024 implanted electrodes via a serial digital link. The design has on-chip configurable spike detection that can reduce off-chip bandwidth by 1250×. With fully integrated power management circuitry with power-on-reset and brown-out detection, our design consumes 24.7mW total power consumption, making it the lowest-power, highest-density AC-coupled neural SoC reported for recording both local field potential (LFP) and action potential (AP) with a 5Hz-10kHz bandwidth.