An Ultra-compact Bidirectional T/R Folded 25.8-39.2GHz Phased-Array Transceiver Front-End with Embedded TX Power Detection/Self-calibration Path Supporting 64-/256-/512-QAM at 28-/39-GHz band for 5G in 65nm CMOS Technology
Wei Zhu, Ruitao Wang, J. Andrew Zhang, Jiawen Wang, Chenguang Li, Yan Wang
Abstract
This paper presents a bidirectional 25.8-39.2GHz phased-array transceiver front-end for 5G in a 65nm CMOS. An efficient T/R folding architecture is proposed, so that the whole transmit(TX) and the receive (RX) paths can be folded together and share footprints to greatly improve the area efficiency with negligible performance penalty. The RX path also can be reused as TX power detection/self-calibration path in TX mode. Broadband transformer-based T/R switching, attenuation and phase-shifting techniques are also introduced to realize broadband beamforming and maintain high area efficiency. The protype achieves measured >25.8-39.2GHz bandwidth in both TX and RX modes. It also supports 64-/256-/512-QAM at 28/39GHz bands for 5G with the core area of 0.195mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> that is only 25 to 40% of the size occupied in prior work.