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SHA2 and SHA-3 accelerator design in a 7 nm technology within the European Processor Initiative

Pietro Nannipieri, Matteo Bertolucci, Luca Baldanzi, Luca Crocetti, Stefano Di Matteo, Francesco Falaschi, Luca Fanucci, Sergio Saponara

2020Microprocessors and Microsystems28 citationsDOIOpen Access PDF

Topics & Concepts

Computer scienceField-programmable gate arrayEmbedded systemHash functionStratixComputer hardwareComputer securityCryptographic Implementations and SecurityPhysical Unclonable Functions (PUFs) and Hardware SecurityChaos-based Image/Signal Encryption
SHA2 and SHA-3 accelerator design in a 7 nm technology within the European Processor Initiative | Litcius