Total ionizing dose hardness analysis of transistors in commercial 180 nm CMOS technology
Mukesh Kumar, Jagpal Singh Ubhi, Sanjeev Basra, Anuj Chawla, H. S. Jatana
Topics & Concepts
NMOS logicPMOS logicGate oxideMaterials scienceThreshold voltageCMOSAbsorbed doseOptoelectronicsDrain-induced barrier loweringTransistorRadiation hardeningElectrical engineeringMetal gateRadiationVoltageOpticsPhysicsEngineeringRadiation Effects in ElectronicsSemiconductor materials and devicesAdvancements in Semiconductor Devices and Circuit Design