An SRAM-based reconfigurable analog in-memory computing circuit for solving linear algebra problems
Piergiulio Mannocci, Enrico Melacarne, Andrea Pezzoli, Giacomo Pedretti, Cristiano Villa, Flavio Sancandi, Umberto Spagnolini, Daniele Ielmini
Abstract
Analog in-memory computing (AIMC) is attracting strong interest for accelerating data-intensive tasks such as artificial intelligence by overcoming the memory wall. Recently, closed-loop AIMC circuits have been proposed to accelerate the solution of problems with high complexity, such as matrix inversion and pseudoinversion with typical O(N <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> ) complexity. This work presents an integrated circuit for AIMC capable of solving linear systems and regression with 0(1) time. Reconfiguration is possible by block mapping within the memory array. The circuit is demonstrated for two signal analytics applications, namely baseband processing in massive multiple-in multiple-out (MIMO) and Kalman filter.