HIR: An MLIR-based Intermediate Representation for Hardware Accelerator Description
Kingshuk Majumder, Uday Bondhugula
Abstract
The emergence of machine learning, image and audio processing on edge devices has motivated research towards power-efficient custom hardware accelerators. Though FPGAs are an ideal target for custom accelerators, the difficulty of hardware design and the lack of vendor agnostic, standardized hardware compilation infrastructure has hindered their adoption.
Topics & Concepts
Computer scienceField-programmable gate arrayVendorHardware accelerationComputer hardwareEmbedded systemRepresentation (politics)Computer architectureEnhanced Data Rates for GSM EvolutionArtificial intelligencePoliticsPolitical scienceMarketingBusinessLawEmbedded Systems Design TechniquesParallel Computing and Optimization TechniquesCCD and CMOS Imaging Sensors