Toward Speculative Loop Pipelining for High-Level Synthesis
Steven Derrien, Thibaut Marty, Simon Rokicki, Tomofumi Yuki
Abstract
Loop pipelining (LP) is a key optimization in modern high-level synthesis (HLS) tools for synthesizing efficient hardware datapaths. Existing techniques for automatic LP are limited by static analysis that cannot precisely analyze loops with data-dependent control flow and/or memory accesses. We propose a technique for speculative LP that handles both control-flow and memory speculations in a unified manner. Our approach is entirely expressed at the source level, allowing a seamless integration to development flows using HLS. Our evaluation shows significant improvement in throughput over standard LP.
Topics & Concepts
Computer scienceSoftware pipeliningHigh-level synthesisParallel computingControl flowComputer architectureKey (lock)ThroughputLoop (graph theory)Embedded systemCompilerProgramming languageField-programmable gate arrayOperating systemMathematicsCombinatoricsWirelessParallel Computing and Optimization TechniquesEmbedded Systems Design TechniquesLogic, programming, and type systems