Double-sided Row Hammer Effect in Sub-20 nm DRAM: Physical Mechanism, Key Features and Mitigation
Longda Zhou, Jie Li, Zheng Qiao, Pengpeng Ren, Zixuan Sun, Jianping Wang, Blacksmith Wu, Zhigang Ji, Runsheng Wang, Kanyu Cao, Ru Huang
Abstract
The double-sided row hammer (rh) effect at the silicon level for sub-20 nm dynamic random access memory (DRAM) is systematically investigated for the first time. Based on 3D TCAD simulation, the impacts of capacitive crosstalk and electron migration are investigated. The latter with trap assistance is found the dominant mechanism behind the enhancement of 1 failure and the alleviation of 0 failure for double-sided rh. Moreover, rh dependences on data pattern, timing parameters and technology nodes are compared under different rh conditions. A trade-off of retention time (t <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ret</inf> ) between 1 failure and 0 failure should be considered when suppressing the double-sided rh effect. With the co-optimization of key process parameters, tret for double-sided rh-induced 1 failure can be improved by 220 times.