SEER: Super-Optimization Explorer for High-Level Synthesis using E-graph Rewriting
Jianyi Cheng, Samuel Coward, Lorenzo Chelini, Rafael Barbalho, Theo Drane
Abstract
High-level synthesis (HLS) is a process that automatically translates a software program in a high-level language into a low-level hardware description. However, the hardware designs produced by HLS tools still suffer from a significant performance gap compared to manual implementations. This is because the input HLS programs must still be written using hardware design principles.
Topics & Concepts
High-level synthesisComputer scienceRewritingImplementationProgramming languageSoftwareGraphComputer architectureProcess (computing)Embedded systemTheoretical computer scienceField-programmable gate arrayParallel Computing and Optimization TechniquesEmbedded Systems Design TechniquesModel-Driven Software Engineering Techniques