An FBAR Driven −261dB FOM Fractional-N PLL
Dihang Yang, David Murphy, Hooman Darabi, Arya Behzad, Richard Ruby, Reed Parker
Abstract
A 1mW −261dB FOM PLL with 91fs jitter is presented that combines a low-noise, high-frequency FBAR reference with the unity-gain harmonic-mixing (HM) PLL to minimize reference noise gain and avoid entirely the amplification of sigma-delta modulator quantization noise and fractional spurs, which, in turn, allows for a substantially larger loop bandwidth to suppress the VCO noise and speed settling.
Topics & Concepts
Phase-locked loopVoltage-controlled oscillatorJitterPhase noiseNoise shapingDelta-sigma modulationBandwidth (computing)PLL multibitPhysicsElectronic engineeringControl theory (sociology)Noise (video)EngineeringComputer scienceElectrical engineeringTelecommunicationsVoltageControl (management)Image (mathematics)Artificial intelligenceAdvancements in PLL and VCO TechnologiesRadio Frequency Integrated Circuit DesignSemiconductor Lasers and Optical Devices