Backside Power Distribution for Nanosheet Technologies Beyond 2nm
Ruilong Xie, Wonhyuk Hong, Chen Zhang, Joongku Lee, Kevin Brew, Richard Johnson, Nicholas A. Lanzillo, H. Shobha, Tae‐Sun Kim, Panjae Park, Shogo Mochizuki, Iqbal Saraf, Chanro Park, Lei Zhuang, Clifford Osborn, Wai Kin Li, Feng Liu, M. Sankarapandian, Chung Ju Yang, Juntao Li, L. Tierney, R. Pujari, Yasir Sulehria, Yuncheng Song, Huimei Zhou, Miaomiao Wang, Michael Belyansky, Somnath Ghosh, Zhang Haojun, K. Motoyama, Debarghya Sarkar, Wukang Kim, Albert Chu, Tao Li, Fabio Carta, Oleg Gluschenkov, Joongsuk Oh, Matthew Malley, Pinlei Chu, S. Nguyen, Katherine Luedders, Joe Lee, Shahrukh Khan, Prabudhya Roy Chowdhury, Huai Huang, Abir Shadman, Stuart Sieg, Daniel J. Dechene, D. Edelstein, John Arnold, Tenko Yamashita, Kisik Choi, Kang-Ill Seo, Dechao Guo, Huiming Bu
Abstract
This paper examines various approaches for integrating backside power distribution network (BSPDN) with nanosheet transistor technologies. Deep Trench Via (DTV) based BSPDN schemes, except for Shifted Frontside Via Backside Power rail (SFVBP), do not offer cell level scaling benefits, but via resistance of SFVBP could remain a bottleneck. Direct Backside Contact (DBC) based schemes offer best cell level scaling. A novel self-aligned backside contact (SABC) scheme integrated with nanosheet transistors is demonstrated with immunity to misalignments in backside contact formation. The structure exhibits good device characteristics and satisfactory reliability.