Low-power test pattern generator using modified LFSR
V. Govindaraj, S. Dhanasekar, K. Martinsagayam, Digvijay Pandey, Binay Kumar Pandey, Vinay Kumar Nassa
Topics & Concepts
Shift registerDissipationBenchmark (surveying)Electronic engineeringPower (physics)Computer scienceTest compressionReduction (mathematics)Built-in self-testElectronic circuitAutomatic test pattern generationTest vectorGenerator (circuit theory)Low-power electronicsFault coverageRippleBinary numberEngineeringPower consumptionElectrical engineeringMathematicsVoltageArithmeticPhysicsTest setQuantum mechanicsThermodynamicsGeographyGeodesyGeometryArtificial intelligenceVLSI and Analog Circuit TestingIntegrated Circuits and Semiconductor Failure AnalysisVLSI and FPGA Design Techniques