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Sleepy keeper style based Low Power VLSI Architecture of a Viterbi Decoder applying for the Wireless LAN Operation sustainability

T. Kalavathi Devi, E. B. Priyanka, P. Sakthivel, A. Stephen Sagayaraj

2021Analog Integrated Circuits and Signal Processing21 citationsDOI

Topics & Concepts

Viterbi decoderComputer scienceSoft-decision decoderViterbi algorithmModelSimElectronic engineeringComputer hardwareDecoding methodsField-programmable gate arrayTelecommunicationsEngineeringVHDLQuantum-Dot Cellular AutomataCoding theory and cryptographyRadio Frequency Integrated Circuit Design
Sleepy keeper style based Low Power VLSI Architecture of a Viterbi Decoder applying for the Wireless LAN Operation sustainability | Litcius