Performance Limit of Monolayer WSe<sub>2</sub> Transistors; Significantly Outperform Their MoS<sub>2</sub> Counterpart
Xiaotian Sun, Lin Xu, Yu Zhang, Weizhou Wang, Shiqi Liu, Chen Yang, Zhiyong Zhang, Jing Lü
Abstract
With the scaling limits of silicon-based MOS technology, the critical and challenging issue is to explore more and more alternative materials to improve the performance of devices. Two-dimensional (2D) semiconductor WSe2 with a proper band gap and inherent stability under ambient conditions makes it a potential channel material for realizing new generation field-effect transistors (FETs). In light of the low on-state current of the experimental sub-10 nm 2D MoS2 FETs, we explore the limitation of the monolayer (ML) WSe2 device performance by using accurate ab initio quantum transport simulation. We find that the sub-10 nm 2D WSe2 FETs apparently outperform their MoS2 counterpart. The on-state current of the optimized p-type ML WSe2 FETs can satisfy the criteria of the International Technology Roadmap for Semiconductors (ITRS) on both the high-performance (HP) and low-power (LP) devices until the gate length is scaled down to 2 and 3 nm, respectively. By the aid of the negative capacitance effect, even the 1 nm gate-length WSe2 MOSFETs can satisfy both the HP and LP requirements in the ITRS 2028 completely. Remarkably, the ML WSe2 MOSFET has the highest theoretical on-current in LP application among the examined 2D MOSFETs at the 5 nm gate length to the best of our knowledge.