Scaling Benefits for Active and Gate Insulator of Vertical Channel Thin-Film Transistors Using Atomic Layer Deposited InGaZnO Channel
Dong-Hee Lee, Young-Ha Kwon, Nak‐Jin Seong, Kyu-Jeong Choi, Jong‐Heon Yang, Chi‐Sun Hwang, Sung‐Min Yoon
Abstract
In-Ga-Zn-O (IGZO) vertical-channel thin-film transistors (VTFTs) were fabricated with thickness scaling of the channel ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${T}_{\textit {CH}}{)}$ </tex-math></inline-formula> and gate insulator ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${T}_{\textit {GI}}{)}$ </tex-math></inline-formula> . The channel bulk trap densities of the VTFTs were estimated to be 40 times larger than those of conventional TFTs due to the rugged back channel. The effects of bulk defects could be minimized by scaling down the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${T}_{\textit {CH}}$ </tex-math></inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${T}_{\textit {GI}}$ </tex-math></inline-formula> to 5 and 15 nm, respectively; hence, the IGZO VTFT exhibited a steep slope of 95 mV/dec and a high current drivability of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$56.4~\mu \text{A} / \mu \text{m}$ </tex-math></inline-formula> .