Package Power Delivery Architecture for High Performance Computing Systems With a 1 kW IVR Operated in CCM-DCM Boundary Mode Condition
Ramin Rahimzadeh Khorasani, Xingchen Li, Joon Woo Kim, Prahalad Murali, Rohit Sharma, Madhavan Swaminathan
Abstract
This paper investigates a package power delivery architecture for high-performance computing (HPC), incorporating a novel modular multi-phase integrated voltage regulator (IVR). The 1-kW 48-12/1 V architecture integrates an efficient interleaved buck-derived converter at the continuous-discontinuous boundary condition, facilitating parallel-connected networks of embedded inductors to deliver hundreds of amperes per phase. Due to the increased duty cycle and zero switching losses provided for the high side switch, the converter’s frequency can be further increased up to 50 MHz with 8 parallel phases and 100 MHz with 16 parallel phases for a 48/1 V, 1 kW architecture. A conceptual 3-D stacked architecture using stacked glass substrates with flip chip GaN switches and embedded inductors, and capacitors is presented, offering a high-density single-stage 48-12/1 V IVR for the next generation of data center applications.