Design of Low-Power 10-Transistor Full Adder Using GDI Technique for Energy-Efficient Arithmetic Applications
T. Nirmalraj, S.K. Pandiyan, Rakesh Kumar Karan, R. Sivaraman, Rengarajan Amirtharajan
Topics & Concepts
AdderPMOS logicMultiplexerNMOS logicSerial binary adderPower–delay productTransistorCMOSComputer scienceTransistor countXOR gateSubtractorElectronic engineeringArithmeticLogic gateElectrical engineeringEngineeringMathematicsAlgorithmVoltageMultiplexingLow-power high-performance VLSI designAnalog and Mixed-Signal Circuit DesignAdvancements in Semiconductor Devices and Circuit Design