Impact of Reverse Gate Oxide Stacking on Gate All Around Tunnel FET for High Frequency Analog and RF Applications
Amit Das, Binod Kumar Kanaujia, Vandana Nath, Sonam Rewari, Rashmi Gupta
Abstract
We have studied the impact of the reverse gate oxide stacking technique on a typical Gate All Around Tunnel Field Effect Transistor (GAA TFET). For this, we have compared it's performance with the conventional GAA TFET. By reverse gate oxide stacking, we mean that it is a gate oxide stacking technique in which a high-k dielectric constant oxide (k <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</sub> ) is just fabricated above the channel and another oxide layer with a low-k dielectric constant value (k <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> ) is formed just above the previous oxide layer where k <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</sub> >k <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> . This significantly improves the device performance. In this paper, DC and AC analysis has been done for both the structures and a detailed comparison has been made for both the structures to demonstrate the usability and efficacy of the proposed reverse gate oxide stacking technique. Various AC performance parameters have been analysed for the proposed reverse gate oxide stacking on the GAA TFET.