Design of area-speed efficient Anurupyena Vedic multiplier for deep learning applications
C. M. Kalaiselvi, R. S. Sabeenian
Topics & Concepts
Multiplier (economics)Computer scienceMathematicsElectronic engineeringArtificial intelligenceArithmeticComputer architectureEngineeringEconomicsMacroeconomicsLow-power high-performance VLSI designAnalog and Mixed-Signal Circuit DesignVLSI and Analog Circuit Testing