Solving Boolean satisfiability problems with resistive content addressable memories
Giacomo Pedretti, Fabian Böhm, Tinish Bhattacharya, Arne Heittmann, Xiangyi Zhang, Mohammad Hizzani, George Hutchinson, Dongseok Kwon, J. W. Moon, E. Valiante, Ignacio Rozada, Catherine E. Graves, Jim Ignowski, Masoud Mohseni, John Paul Strachan, Dmitri B. Strukov, Ray Beausoleil, Thomas Van Vaerenbergh
Abstract
Solving optimization problems is a highly demanding workload requiring high-performance computing systems. Optimization solvers are usually difficult to parallelize in conventional digital architectures, particularly when stochastic decisions are involved. Recently, analog computing architectures for accelerating stochastic optimization solvers have been presented, but they were limited to academic problems in quadratic polynomial format. Here we present KLIMA, a k − L ocal I n- M emory A ccelerator with resistive Content Addressable Memories (CAMs) and Dot-Product Engines (DPEs) to accelerate the solution of high-order industry-relevant optimization problems, in particular Boolean Satisfiability. By co-designing the optimization heuristics and circuit architecture we improve the speed and energy to the solution up to 182 × compared to the digital state of the art.