Device Design Direction of CSTBT for Low Loss and EMI Noise
Koichi Nishi, Kazuya Konishi, Toshiya Tadakuma, Akihiko Furukawa, Wataru Saito
Abstract
This article presents the electromagnetic interference (EMI) noise mechanism of carrier stored trench-gate bipolar transistor (CSTBT). We experimentally and numerically analyze structural parameter dependencies of the EMI noise of CSTBT. It has been clear that the gate voltage lift-up derives from a negative gate capacitance at the side of the carrier stored layer (CS-layer) and leads to a current surge increase, which results in EMI noise. The EMI noise can be reduced by a decrease in gate-collector capacitance and transconductance and an increase in gate-emitter capacitance and threshold voltage.
Topics & Concepts
EMIElectromagnetic interferenceCapacitanceElectrical engineeringNoise (video)TransconductanceMaterials scienceOptoelectronicsParasitic capacitanceDiffusion capacitanceElectronic engineeringTransistorVoltageEngineeringPhysicsComputer scienceImage (mathematics)ElectrodeQuantum mechanicsArtificial intelligenceRadio Frequency Integrated Circuit DesignAdvancements in Semiconductor Devices and Circuit DesignElectromagnetic Compatibility and Noise Suppression