A <scp>switched‐capacitor</scp> multilevel inverter topology employing a novel variable structure nearest‐level modulation
Zeeshan Sarwer, Marif Daula Siddique, Adil Sarwar, Mohammad Zaid, Atif Iqbal, Saad Mekhilef
Abstract
This article introduces a nine-level switched-capacitor multilevel inverter with twice voltage boosting feature. It also aims at proposing a novel variable structure nearest-level modulation scheme that has been implemented in the proposed topology. The proposed inverter structure possesses a reduced number of switches as compared to some of the recently proposed topologies. Moreover, the proposed arrangement also has an improvement in terms of the reverse blocking voltage (or total standing voltage) of the switch, which determines the rating of the switch requirement. The proposed topology has a voltage boosting feature along with the self-voltage balancing ability of the capacitors. A detailed analysis has been performed in the article, which contains the simulation results for different loading conditions and for varying modulation indexes. Besides, the power loss analysis of the proposed structure is carried out using PLECS software. Losses and efficiency have been explained with the help of graphical analysis. Hardware results, which are obtained using an experimental setup, are also shown and discussed in this article to validate the results obtained by simulation.