Challenge and Trend of SRAM Based Computation-in-Memory Circuits for AI Edge Devices
Xin Si, Yongliang Zhou, Jun Yang, Meng‐Fan Chang
Abstract
The conventional von-Neumann computational architecture is ill-suited to energy-efficient artificial intelligence (AI) edge devices, due to the separation of memory and computing units. Compute-in-Memory (CIM) arrays have been developed to break through this the memory-wall bottleneck and improve energy efficiency. In this article, we review a number of recent silicon verified compute-in-memory designs and outline on-going challenges and trends in the further development of this technology.
Topics & Concepts
Computer scienceBottleneckIn-Memory ProcessingVon Neumann architectureParallel computingStatic random-access memoryComputer architectureMemory architectureComputationEfficient energy useEnhanced Data Rates for GSM EvolutionComputer engineeringMemory managementComputational scienceSemiconductor memoryEmbedded systemComputer hardwareArtificial intelligenceAlgorithmOperating systemEngineeringElectrical engineeringSearch engineInformation retrievalWeb search queryQuery by ExampleAdvanced Memory and Neural ComputingFerroelectric and Negative Capacitance DevicesSemiconductor materials and devices