A 125 <i>μ</i> m-Pitch-Matched Transceiver ASIC With Micro-Beamforming ADC and Multi-Level Signaling for 3-D Transfontanelle Ultrasonography
Peng Guo, Fabian Fool, Zu‐Yao Chang, Emile Noothout, Hendrik J. Vos, Johan G. Bosch, Nico de Jong, Martin D. Verweij, Michiel A. P. Pertijs
Abstract
This article presents a pitch-matched transceiver application-specific integrated circuit (ASIC) for a wearable ultrasound device intended for transfontanelle ultrasonography, which includes element-level 20-V unipolar pulsers with transmit (TX) beamforming, and receive (RX) circuitry that combines eightfold multiplexing, four-channel micro-beamforming ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu$</tex-math> </inline-formula> BF), and subgroup-level digitization to achieve an initial 32-fold channel-count reduction. The <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu$</tex-math> </inline-formula> BF is based on passive boxcar integration, merged with a 10-bit 40 MS/s SAR ADC in the charge domain, thus obviating the need for explicit anti-alias filtering (AAF) and power-hungry ADC drivers. A compact and low-power reference generator employs an area-efficient MOS capacitor as a reservoir to quickly set a reference for the ADC in the charge domain. A low-power multi-level data link, based on 16-level pulse-amplitude modulation, concatenates the outputs of four ADCs, providing an overall 128-fold channel-count reduction. A prototype transceiver ASIC was fabricated in a 180-nm BCD technology, and interfaces with a 2-D PZT transducer array of 16 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times$</tex-math> </inline-formula> 16 elements with a pitch of 125 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu$</tex-math> </inline-formula> m and a center frequency of 9 MHz. The ASIC consumes 1.83 mW/element. The data link achieves an aggregate 3.84 Gb/s data rate with 3.3 pJ/bit energy efficiency. The ASIC’s functionality has been demonstrated through electrical, acoustic, and imaging experiments.