Impact of Process on Gate Leakage Current and Time-Dependent Dielectric Breakdown Failure Mechanisms of 4H-SiC MOS Capacitors
Guibao Wang, Bo Peng, Lei Yuan, Yuming Zhang, Renxu Jia
Abstract
This article offers an analysis that includes both experimental and theoretical dimensions of silicon carbide (SiC)/SiO2 metal-oxide-semiconductor (MOS) capacitors. The study integrates first-principles calculations to clarify the physical failure mechanism associated with time-dependent dielectric breakdown (TDDB). Initially, by electrical characterizations of J–<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V} _{g}$ </tex-math></inline-formula> curves and TDDB in the two different devices, elucidating the associated physical mechanisms underlying gate reliability issues at diverse gate voltage (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {gs}}$ </tex-math></inline-formula>) and temperatures, which was found that elevated temperature induces a reduction in the potential barrier height, resulting in a higher tunneling current. Furthermore, to reveal the failure mechanisms of TDDB, first principles were used. It is concluded that: 1) under constant voltage, with the extension of time, the SiO2 layer will capture more electrons, and, when it reaches a certain degree, a conductive path will be formed in the gate oxygen, causing breakdown and 2) as the gate voltage increases, the electron capture rate will significantly increase, leading to a rapid reduction of the breakdown time of the SiO2 gate oxide layer.