Viable strategy to minimize trap states of patterned oxide thin films for both exceptional electrical performance and uniformity in sol–gel processed transistors

Do Kyung Kim, Kyeong-Ho Seo, Dae-Hyeon Kwon, Sang-Hwa Jeon, Yu-Jin Hwang, Ziyuan Wang, Jaehoon Park, Sin‐Hyung Lee, Jaewon Jang, In Man Kang, Xue Zhang, Jin‐Hyuk Bae