32-Bit RISC Processor Using VedicMultiplier

Suggula Naga Sai Vishnu, Abhishek Gandluru, S R Ramesh

20222022 3rd International Conference for Emerging Technology (INCET)12 citationsDOI

Abstract

Multiplier unit is a key component in high-speed processor like Digital Signal processor, graphic processor. With increase in the demand for high speed, low latency, low power and low area the demand for new techniques is high. Although several multipliers like booth multipliers, have shown some improvements in these performance parameters but Vedic multiplier based on Vedic mathematics is currently in focus due to its high speed and lower power qualities. Vedic Multiplier technique is used for fast multiplication of large numbers. It is based on" UrdhvaTriyakbhyam" which is among the 16 Vedic Sutras and which was used by ancient Indian gurusandre-discovered recently from Vedas. Multiplication serves as a key hardware block in today’s technologies like Machine Learning, Deep Learning and Digital Signal Processing. Previous Vedic multiplier showed promising results to use in general purpose processor. This paper presents the designof32-bitRISCprocessorusing32-bitVedicmultiplier.

Topics & Concepts

Multiplier (economics)Computer scienceArithmeticDigital signal processingDigital signal processorField-programmable gate arrayMultiplication (music)Computer hardwareParallel computingAdderLatency (audio)MathematicsTelecommunicationsEconomicsCombinatoricsMacroeconomicsLow-power high-performance VLSI designNumerical Methods and AlgorithmsAnalog and Mixed-Signal Circuit Design